Collaborative Heterogeneity for Building Energy Efficient Systems

Date: 
Wednesday, February 17, 2010 - 8:34am

COMPUTER ENGINEERING PROGRAM COLLOQUIUM SERIES
sponsored by Hewlett-Packard Labs

MONDAY, February 22, 2010
2:00 PM – 3:00
Computer Science Conference Room (Harold Frank Hall, Rm 1132)

HOST: Computer Engineering Program

SPEAKER: Rajesh K. Gupta
Professor, University of California, San Diego

Title: Collaborative Heterogeneity for Building Energy Efficient Systems

Abstract:

Computing today operates in distributed, dynamic and sensor rich environments. Consequently, designing computer systems for low power entails not only the use of the best design practices in various components from processors, memories to radios but also awareness of power-related decision making across subsystems and functional abstractions. What then are the engineering principles that can be applied to guide system designer with low power consumption as a key design criterion? This talk is a retrospective look at the strategies deployed to reduce power consumption and improve energy efficiency across a number of efforts. Among the important lessons learnt is the need for algorithm/architecture co-design to support aggressive duty-cycling in systems. We explore the notion of “collaborative heterogeneity” in building integrated communication and computing systems that can enable us to reach achievable efficiencies while ensuring important performance and availability requirements.

Biography:

Rajesh K. Gupta is a professor of Computer Science and Engineering at UC San Diego, and holds the QUALCOMM endowed chair. His research interests are in energy efficient systems that have taken turn towards large-scale energy use in recent years. He directs smart buildings/smart grids task force at UC San Diego in his role as associate director for the California Institute for Telecommunications and Information Technology (CalIT2). His recent contributions include SystemC modeling and SPARK parallelizing high-level synthesis, both of which are publicly available and have been incorporated into industrial practice. Earlier Gupta lead or co-lead DARPA-sponsore efforts under the Data Intensive Systems (DIS) and Power Aware Computing and Communications (PACC) programs that demonstrated architectural adaptation and compiler optimizations in building high performance and energy efficient system architectures.

His ongoing efforts include energy-efficient data-centers and large scale computing using memory-coherent algorithmic accelerators and non-volatile storage systems. In recent years, Gupta and his students have received a best paper award at IEEE/ACM DCOSS’08 and a best demonstration award at IEEE/ACM IPSN/SPOTS’05. Gupta received a BTech in EE from IIT Kanpur, MS in EECS from UC Berkeley and a PhD in Electrical Engineering from Stanford University. He currently serves as EIC of IEEE Embedded Systems Letters. Gupta is a Fellow of the IEEE.