“Stochastic Computing: Embracing Errors in Architecture and Design of Processors and Applications,” John Sartori, UIUC

Wednesday, February 22, 2012 - 1:26pm


Friday, March 2, 2012
10:00 – 11:00am
Electrical & Computer Engineering Conference Room (HFH 4164)

SPEAKER: John Sartori
University of Illinois, Urbana-Champaign

TITLE: Stochastic Computing: Embracing Errors in Architecture and Design of Processors and Applications

All of computing today relies on an abstraction where software expects hardware to behave flawlessly for all inputs, under all conditions. While this abstraction worked well historically, due to the relatively small magnitude of variations in hardware and environment, computing will increasingly be done with devices and circuits that are inherently stochastic because of how small they are, or whose behavior is stochastic due to manufacturing and environmental uncertainties. For such emerging circuits and devices, the cost of guaranteeing correctness will be prohibitive, and we will need to fundamentally rethink the correctness contract between hardware and software. Such rethinking becomes particularly compelling considering that a significant amount of energy is wasted in guaranteeing reliability even for applications that are inherently error tolerant.

The primary goal of my research has been to revisit the correctness contract between hardware and software to enable extremely energy-efficient computing. Instead of computing machines where hardware variations are always hidden from the software behind conservative design specifications, my research advocates computing machines (stochastic processors) where (a) these variations are opportunistically exposed to the highest layers of software in the form of hardware errors, and (b) software and hardware are optimized to maximize energy savings while delivering acceptable outputs, in spite of errors. In this talk, I will describe architecture and physical design-based approaches to build and optimize stochastic processors. I will also discuss our ongoing work on building applications for such processors. As a proof of concept, I will discuss an example prototype system based on commodity hardware that exploits application-level error tolerance to maximize system efficiency. Finally, I will outline some other promising approaches to energy-efficient computing for emerging applications.

John Sartori received a B.S. degree in electrical engineering, computer science, and mathematics from the University of North Dakota, Grand Forks and a M.S. degree in electrical and computer engineering from the University of Illinois at Urbana-Champaign (UIUC). He is currently finishing a Ph.D. in electrical and computer engineering at UIUC. His research interests include stochastic computing, energy-efficient computing, and system architectures for emerging workloads. John’s research has been recognized by a best paper award [CASES 2011] and a best paper award nomination [HPCA 2012] and has been the subject of several keynote talks and invited plenary lectures. His work has been chosen to be the cover feature for popular media sources such as BBC News and HPCWire, and has also been covered extensively by scientific press outlets such as the IEEE Spectrum and the Engineering and Technology Magazine. When not doing research, John enjoys outdoor activities in the balmy Champaign weather, playing music, and studying and discussing philosophy.