ECS 154B : MIC-1 Implemented in Quartus
Due: 23:59 4/30/2009.
Version 1
This lab will be graded interactively, sign-up sheets will be posted
near the due date. Any student who misses his/her group's grading time
will receive a 0 for this assignment.
In this lab, you will build the MIC-1 machine using Quartus. Your
machine will be as describe in
the Matloff handout, but with following differences:
The MBR will obtain its input from the A bus (from the output of
the Amux) instead of the C bus.
This will require you to understand and possibly modify your microcode
or the binary of
your assembled microcode to make the machine work. "MBR:=x" will no
longer work in the same way.
You will implement the control store with a ROM.
You will want to use micmif to convert .mic
files for use with Quartus (so that it can be loaded into the ROM).
You must use your own microcode from Lab 1 (in the event that you did
not get Lab 1 working, you must get it working for this assignment).
The DRAM will be implemented by a RAM, be pre-programmed
with you MAC test program, and may be as small as possible to contain
the program. You will want to use macmif to convert .mac
files for use with Quartus (so that it can be loaded into the RAM).
Misc...
Information on micmif and macmif can be found
on the
here .
HINT: You can build the subcycle generator by assuming that you will
have a 4X clock input that is as fast of the subcycles. Feed the
clock into a 2 bit counter and use the output of the counter and some
logic gates to generate the subcycle pulses.
Additional hints can be found in this
file.
EXTRA CREDIT (10pts) : Download your design onto the Altera
hardware.
You will need to test your design using timing simulation, add LED
drivers, and add button input. Then talk to your TA about checking out
one of the boards.
Last updated April 2009
chong@cs.ucsb.edu