Interests: Java-centric cluster computing services, parallel processing, and multiprocessor scheduling.
Peter Cappello received the Ph.D. degree in Computer Science from Princeton University in 1982. He joined UC Santa Barbara's Department of Computer Science in July of that year. He has investigated multi-processor scheduling, systolic arrays, and the relationship between algorithms and architectures for parallel processing. Via Javelin, CX, and, the JICOS project, he is investigating cluster computing. Jointly with Charles Munger, he recently leveraged the Jicos project in the development of jPregel for developing and executing distributed graph algorithms. He advised Karl Lopker on the Pheme project, which provides web-based status and control for cloud applications. He also is interested in self-directed learning.
He has published journal articles on Java-centric Internet-based parallel computing, optimal multiprocessor schedules for fundamental algorithms, a programming language for systolic algorithms, parallel algorithms for scientific computations, formal manipulation of systolic algorithms, integer multiplication, bit-level systolic algorithms, special-purpose architectures for digital signal processing, and computer-aided design of digital filter chips. Drs. Cappello and Miranker received both a US and a European patent on behalf of the National Science Foundation, the University of California, and the IBM corporation for inventions related to a floating-point summation device. He is a senior member of the Institute for Electrical and Electronics Engineers (IEEE), and a member of the IEEE Computer Society, the IEEE Signal Processing Society, and the Association for Computing Machinery (ACM). Dr. Cappello also is a member of the ACM Special Interest Group on Algorithms and Computation Theory, and the Advisory Board of the IEEE Signal Processing Society's Technical Committee on Design and Implementation of Signal Processing Systems (previously known as the Technical Committee on VLSI), of which he served as founding Chair.
He chaired the 1984 IEEE Workshop on VLSI Signal Processing, and co-edited VLSI Signal Processing (IEEE Press). He was Program Co-Chair for the 1994 Int. Conf. on Application Specific Array Processors (ASAP'94), and Conference Co-Chair for ASAP'95. Dr. Cappello is a past Associate Editor of the IEEE Transactions on Acoustics, Speech, and Signal Processing, and is on the editorial board of the Journal of VLSI Signal Processing.